mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
mov_imm r1, PLAT_QEMU_CRASH_UART_CLK_IN_HZ
mov_imm r2, PLAT_QEMU_CONSOLE_BAUDRATE
- b console_core_init
+ b console_pl011_core_init
endfunc plat_crash_console_init
/* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm r1, PLAT_QEMU_CRASH_UART_BASE
- b console_core_putc
+ b console_pl011_core_putc
endfunc plat_crash_console_putc
/* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm r0, PLAT_QEMU_CRASH_UART_BASE
- b console_core_flush
+ b console_pl011_core_flush
endfunc plat_crash_console_flush
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
/* Initialize the console to provide early debug support */
- console_init(PLAT_QEMU_BOOT_UART_BASE, PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
- PLAT_QEMU_CONSOLE_BAUDRATE);
+ qemu_console_init();
ERROR("qemu sp_min, console init\n");
/*